1. Field of the Invention
The present invention relates to an apparatus with on A/D converter for processing a color television signal. More specifically, the present invention relates to an apparatus which is utilized in a video recording/reproducing apparatus, a television receiver, and etc., and includes an A/D converter which converts a color television signal into color television signal data (digital color television signal).
2. Description of the Prior Art
In order to sample a color television signal (hereinafter, simple referred to as a television signal); and by an A/D converter in synchronous with a color burst signal included in the television signal, conventionally, a so-called burst PLL (Phase-Locked Loop) is constructed, and a sampling clock is obtained form an output of the PLL.
More specifically, with referring to FIG. 1 showing prior art, an inputted composite color television signal is applied an A/D converter 3 via a low-pass filter 1 and a pedestal clamp circuit 2 and subjected to an A/D conversion on the basis of a sampling clock which is produced by a PLL and has a frequency of 4 Fsc (four times a frequency of a subcarrier signal).
In the PLL 4, the composite color television signal is applied to a bandpass filter 4a so as to be subjected to a Y/C separation. A chrominance signal component (a burst signal) from the bandpass filter 4a is given to a phase comparator 4b. The composite color television signal is also applied to a synchronization signal separation circuit 4c. A burst gate pulse is produced by a burst gate pulse generation circuit 4d on the basis of a horizontal synchronization signal outputted form the synchronization signal separation circuit 4c, and the phase comparator 4b is enable by the burst gate pulse. Therefore, the phase comparator 4b compares a phase of the above-described burst signal with an output of a frequency-division circuit 4f which frequency-divides an oscillation signal of a VCO 4e having an oscillation frequency of 4 Fsc by 1/N (1/4, for example). An output of the phase comparator 4b is applied to the VCO 4e. Thus, the burst PLL 4 is constructed.
Then, an output of the A/D converter 3 is processed by a 3-dimension Y/C separation circuit 5a, etc., in a digital signal processor (DSP) 5, and applied to D/A converters 6a and 6b so as to be converted again into an analog luminance signal and an analog chrominance signal. Outputs of the D/A converters 6a and 6b are further applied to demodulation circuit (not shown) so as to be demodulated with an analog signal processing.
In the prior art of FIG. 1, there is a possibility that an indefinite phase error occurs between the sampling clock applied to the A/D converter 3 and the burst signal due to influences of temperature drifts in the bandpass filter 4a, the pedestal clamp circuit 2, etc. Therefore, color demodulation by a digital signal processing cannot be performed properly, and accordingly, as shown in FIG. 1, color demodulation is performed after the digital chrominance signal is converted into the analog chrominance signal by the D/A converter 6B. Therefore, there are disadvantages in that not only a circuit configuration becomes complex but also a signal processing efficiency is bad.
It is possible to solve the disadvantage in the prior art shown in FIG. 1 of the indefinite phase error occurring between the sampling clock and the burst signal by FIG. 2 prior art.
In the prior art circuit of FIG. 2, there are provided a phase comparator 7 and a phase shifter 8 in the DSP 5, and a phase error between the burst signal (burst data) that is converted into a digital signal by the A/D converter 3 and the sampling clock form the VCO 4e detected, and a phase of the sampling clock is changed according to the phase error by the phase shifter 8, and then the sampling clock is applied to the 3-dimension Y/C separation circuit 5a.
In the prior art of FIG. 2, in order to eliminate an influence of noise, it is necessary to average the burst data within one field, for example, and therefore, there is a disadvantage in that it is necessary to provide a memory having a large capacity capable of storing a large number of burst data.